Section: Week 2 - A bird's eye view on SDAccel | Developing FPGA-accelerated cloud applications with SDAccel: Theory

Week 2 - Learning outcomes Page

Hardware Design Flow Page

An introduction to SDAccel and the OpenCL-based flow Page

OpenCL computational model: global and local sizes Page

Not only OpenCL! The Rationale behind the RTL and C flows Page

SDAccel memory model Page

SDAccel "emulations" Page

SDAccel runtime Page

Quiz 3 - Week 2

Section outline